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A semiconductor device having an output buffer circuit capable of outputting data while taking impedance matching with an external data transmission line
A semiconductor device having an output buffer circuit capable of outputting data while taking impedance matching with an external data transmission line
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机译:具有输出缓冲电路的半导体器件,该输出缓冲电路能够在与外部数据传输线进行阻抗匹配的同时输出数据
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摘要
Outline of initiation;down pull-down output transistor 184 pulls the potential D of the output node 183 to ground potential GND to pull the pull-down gate control transistor 185a into conduction and pull the output node 183 and the n-channel pull-184 are turned on.
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