mixed technology integrated circuit manufactured with cmos structures and efficient lateral bipolartransistoren with increased early voltage and manufacturing method for it

摘要

A high density, mixed technology integrated circuit comprises CMOS structures and bipolar lateral transistors, the electrical efficiency and Early voltage of which are maintained high by forming "well" regions through the collector area. The operation determines the formation of a "collector extension region" extending relatively deep within the epitaxial layer so as to intercept the emitter current and gather it to the collector, subtracting it from dispersion toward the substrate through the adjacent isolation junctions surrounding the region of the lateral bipolar transistor. Under comparable conditions, the ratio between Ic/Isubstrate is incremented from about 8 to about 300 and the Early voltage from about 20 V to about 100 V. The VCEO, BVCBO and BVCES voltages are also advantageously increased by the presence of said "well" region formed in the collector zone.