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Apparatus for detecting undefined states of a finite state machine (FSM) and resetting the FSM upon detection

机译:用于检测有限状态机(FSM)的未定义状态并在检测到时重置FSM的设备

摘要

A finite-state machine has combinatorial logic connected to a status memory which receives future state signals from the finite-state machine and sends current state signals to the finite-state machine. The combinatorial logic also receives and generates input and output signals which are external to the finite-state machine. The finite-state machine compares the future state signals to at least one reference level to set an error message to reset the finite-state machine for reliable computing and adjustment.
机译:有限状态机的组合逻辑连接到状态存储器,状态存储器从有限状态机接收将来的状态信号,并将当前状态信号发送到有限状态机。组合逻辑还接收并生成有限状态机外部的输入和输出信号。有限状态机将未来状态信号与至少一个参考电平进行比较,以设置错误消息以重置有限状态机,以进行可靠的计算和调整。

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