PROBLEM TO BE SOLVED: To provide an asynchronous one bit adder/subtracter and a full adder/ subtracter, which can simultaneously execute addition/subtraction operation and matching judgment at high speed. ;SOLUTION: XOR 11 and 12 inputting input signals Xi and Yi and a switch 14 for selecting either the input signal Yi or an input signal CBi from a low- order bit and outputting it as an output signal Bo by using the result signal of an exclusive OR and a mode switch input signal Mi for switching addition or subtraction are provided. Furthermore, a switch 151 for selecting a matching judgment input signal Ei and a matching judgment output signal Eo from a logic level showing 'non-matching' and outputting it is provided and the adder/ subtracter of asynchronous one bit is constituted. The asynchronous one bit adder/subtracter is constituted into the asynchronous full adder/subtracter which is provided in accordance with the bit width of one group of numeric input signals X and Y having bit width of more than two bits, which judges the matching of X and Y in parallel to the output of the subtraction operation result of 'X-Y' and outputs the result.;COPYRIGHT: (C)1997,JPO
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