Scalable flow virtual study neuro-computer

摘要

The Pyramid Learning Architecture Neurocomputer (PLAN) (Figures 1 and 2) is a scalable stacked pyramid arrangement of processor arrays. There are six processing levels (Figures 1 and 2) in PLAN consisting of the pyramid base, level 6, containing N2 SYnapse Processors (SYPs), level 5 containing multiple folded Communicating Adder Tree structures (SCATs), level 4 made up of N completely connected Neuron Execution Processors (NEPs) (Fig. 16) level 3 made up of multiple Programmable Communicating Alu Tree (PCATs) structures, (Figures 12 and 13) similar to level 5 SCATs but with programmable function capabilities in each tree node, level 2 containing the Neuron Instruction Processor (NIP), and level 1 comprising the host and user interface. The simplest processors are in the base level with each layer of processors increasing in computational power up to a general purpose host computer acting as the user interface. PLAN is scalable in direct neural network emulation and in virtual processing capability.