Semiconductor integrated circuit device having ECL gate circuits

摘要

A semiconductor integrated circuit device includes a plurality of ECL gate groups (b′-1 ∼ b′-4). Each gate group includes a plurality of ECL gates (b′) each having a constant current source formed by a MOS transistor circuit (M1, M2). Each gate group also includes one gate voltage control circuit (f). When the gate voltage control circuit receives a signal indicating a selection state for the group, it applies a high potential bias voltage (VB) to the MOS transistor circuits of all the ECL gates within the gate group. On the other hand, when it receives a signal indicating a non-selection state, it applies a low potential bias voltage (GND potential) to them, thereby lowering the constant current to the minimum necessary amount. The circuit is capable of largely saving the current consumption by controlling the bias voltage for the MOS transistor circuits in two steps depending on the selection state or the non-selection state.