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Precharge Circuit on Read Data Bus

机译:读数据总线上的预充电电路

摘要

According to an aspect of the present invention, there is provided a means for generating a precharge enable signal (14); the differential amplifying means in accordance with an output of a differential amplifying means for receiving a driving voltage / 2 level voltage as a first input terminal according to the precharge enable signal. Drive means (12) for changing the potential of the first input terminal to be the driving voltage / 2; and connecting means (13) for connecting between the second input terminal of said differential amplifying means and a read data bus; The precharge circuit of the read data bus is used to reduce the swing width of the read data bus, which is the output of the sense amplifier, from the drive voltage (VCC) to the drive voltage (VCC) / 2, thereby improving the speed characteristics of the memory product. It would be.
机译:根据本发明的一个方面,提供了一种用于产生预充电使能信号(14)的装置;所述差分放大装置根据用于根据所述预充电使能信号接收驱动电压/ 2电平电压作为第一输入端子的差分放大装置的输出。驱动装置(12),用于将第一输入端子的电位改变为驱动电压/ 2;连接装置(13),用于在所述差分放大装置的第二输入端和读取数据总线之间进行连接。读取数据总线的预充电电路用于减小作为读出放大器输出的读取数据总线的摆幅从驱动电压(VCC)到驱动电压(VCC)/ 2。内存产品的速度特性。这将是。

著录项

  • 公开/公告号KR970049254A

    专利类型

  • 公开/公告日1997-07-29

    原文格式PDF

  • 申请/专利权人 김주용;

    申请/专利号KR19950064517

  • 发明设计人 김규석;

    申请日1995-12-29

  • 分类号G06F1/00;

  • 国家 KR

  • 入库时间 2022-08-22 03:16:47

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