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PSEUDO SRAM COMPRISING PAGE ACTIVE CIRCUIT TO PREVENT ERROR OPERATION OF DATA READ, IN WHICH UNSTABLE PRECHARGE BETWEEN GLOBAL DATA BUS LINES IS PREVENTED
PSEUDO SRAM COMPRISING PAGE ACTIVE CIRCUIT TO PREVENT ERROR OPERATION OF DATA READ, IN WHICH UNSTABLE PRECHARGE BETWEEN GLOBAL DATA BUS LINES IS PREVENTED
PURPOSE: A pseudo SRAM comprising a page active circuit to prevent an error operation of data read is provided to prevent unstable precharge between global data bus lines generated during a short transition of a page address. CONSTITUTION: A pseudo SRAM includes a row path(300) enabling a word line by detecting transition of an address signal and a column path(400) comprising a page address transition detection part(410) and a page active signal generation part(420) and a column signal control part(430). The page address transition detection part outputs a page address transition detection signal by detecting transition of a page address signal. The page active signal generation part generates a page active signal having a pulse period to precharge a global data bus line and a global data bus bar line sufficiently as to the page address transition detection signal. And the column signal control part enables a column selection signal as to the input of the page active signal.
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