MEMORY CIRCUIT AND DETECTING METHOD OF WRITE/READ ERROR THEREFOR

摘要

PROBLEM TO BE SOLVED: To provide a memory circuit with which an error can be surely detected. SOLUTION: While using data (a) written in a memory 1 as an input, a parity generator 2 calculates the parity and supplies it to an exclusive OR circuit (XOR) 4. A divide by 3 counter 3 divides the frequency of a data write clock (b) to the memory 1 by three and inputs the result to an XOR 4 and the parity prepared by the parity generator 3 becomes a parity (d) for which the control of 'inversion'/'non-inversion' of the polarity is applied for each three words. A parity (g) read out of the memory 1 is inputted to an XOR 6. A signal (f), for which the frequency of the data read clock from the memory 1 is divided by three by a divide by 3 circuit 7, is inputted and the parity (g) is 'inversion'/'non-inversion' processed for each three words and the result is inputted to a parity check circuit 5. When the inputted parity is in error, the parity check circuit 5 outputs a parity alarm (h).