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INTEGRATED CIRCUIT PACKAGE AND FLAT PLATE MOLDING PROCESS FOR INTEGRATED CIRCUIT PACKAGE
INTEGRATED CIRCUIT PACKAGE AND FLAT PLATE MOLDING PROCESS FOR INTEGRATED CIRCUIT PACKAGE
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机译:集成电路封装和用于集成电路封装的平板成型工艺
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ABSTRACT OF THE DISCLOSURE An integrated circuit package having a top opening anda cavity, with a chip adhered in the cavity. The topopening has routing strips electrically connecting the topopening with the outer surface. The routing strips areelectronically connected to bonding pads located in acentral area of the chip. Following assembly of thecomponents, the top opening and the cavity are encapsulatedin a molding process. A method is provided for forming asubstantially flat integrated circuit package.Figure 1
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