1. The technical field to which the invention described in the claims belongs:;We will be concerned with the submicron gate array I / O master slice.;2. The technical problem to be solved by the invention:;A submicron gate array input / output master slice is provided to ensure stable operation.;3. Summary of the solution of the invention:;A sub-micron gate array input / output master slice, comprising: a level shift region consisting of an n-type transistor region, an isolated-type transistor region, and a shared-type transistor region; a receiving region comprising an isolated-type transistor and an-en transistor; The present invention is made up of a free drive region consisting of a separate type transistor and an n-type transistor, and an output drive region composed of a left-right symmetrical separated transistor.;4. Important uses of the invention:;Suitable for submicron gate array input and output master slices.
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