Digital phase controller frequency synthesizer containing a frequency divider with a rational ratio

摘要

The present invention relates to a frequency synthesizer supplying a synthesised signal (NF), comprising an oscillator (10-2) supplying a high-speed clock signal (Fh) to a divider (22) which is programmable by a digital data item (C), the high-order bits (K) of the digital data item being supplied to the programmable divider and the low-order bits to an accumulator (26) interacting with the programmable divider to increment its order of division by one unit when the accumulator overflows. The synthesizer comprises: a generator 27 of n phases (NF1 to NFn) with increasing delays of the synthesised signal (NF); a circuit (29) for comparison of the content (A) of the accumulator with N ranges of possible increasing values; and a circuit (28) for selection, as synthesised signal, of the phase, the order of which corresponds to that of the range in which the content of the accumulator lies. IMAGE