More precisely, of digital clock generator a fault-tolerant

• 1. 生产复合材料,更准确地说是超微孔体的方法以及由其生产的超微孔体 [P] . 中国专利： CN1198148A . 1998-11-04
• 2. 使用一基础参考信号和具有比该基础参考信号更准确的一不连续校准参考信号 ,用于校准一电子时钟的方法、系统、无线终端以及计算机程序产品 [P] . 中国专利： CN1211716C . 2005.07.20
• 3. Parallel analog sampling circuit and analog-to-digital converter system incorporating clock signal generator generating sub-sampling clock signals with fast and precisely-timed edges [P] . 美国专利： US6259281B1 . 2001-07-10

  机译： 包含时钟信号发生器的并行模拟采样电路和模数转换器系统，产生具有快速且精确定时的边沿的子采样时钟信号

• 4. Time-to-digital converter and digital-controlled clock generator and all-digital clock generator [P] . 美国专利： US8686756B2 . 2014-04-01

  机译： 时间数字转换器，数字控制时钟发生器和全数字时钟发生器

• 5. TIME-TO DIGITAL CONVERTER AND DIGITAL-CONTROLLED CLOCK GENERATOR AND ALL-DIGITAL CLOCK GENERATOR [P] . 美国专利： US2013038349A1 . 2013-02-14

  机译： 数字转换器时间转换和数字控制时钟发生器以及全数字时钟发生器

• 1. The Probability Model of the Multi-valued KM_1M_2 Clock Controlled Generator [J] . DU Yi-bin, HUANG Xiao-ying, LI Zheng-chao, 数学季刊：英文版 . 2011,第001期
• 2. Clock generator and OOK modulator for RFID application [J] . 浙江大学学报（英文版）（A辑：应用物理和工程） . 2005,第010期
• 3. Evolutionary Design of Fault-Tolerant Digital Circuit Based on Cartesian Genetic Programming [J] . LI Dan-yang, CAI Jin-yan, ZHU Sai, 东华大学学报（英文版） . 2016,第002期
• 4. A high precision time-to-digital converter based on multi-phase clock implemented within Field-Programmable-Gate-Array [J] . CHEN Kai, LIU Shubin, AN Qi 核技术（英文版） . 2010,第002期
• 5. A high precision time-to-digital converter based on multi-phase clock implemented within Field-Programmable-Gate-Array [J] . CHEN Kai, LIU Shubin, AN Qi 核技术：英文版 . 2010,第002期
• 6. A FAULT-TOLERANT DIGITAL CLOCKING SYSTEM [C] . Daly, W.M., Hopkins, . 2001
• 7. A multiphase clock generator using single -delay -line phase compensation technique and its application in 1/n-rate clock and data recovery [D] . Chen, Xu 2007
• 8. Rigorously modeling self-stabilizing fault-tolerant circuits: An ultra-robust clocking scheme for systems-on-chip [O] . Danny Dolev, Matthias Függer, Markus Posch, -1
• 9. A low noise clock generator for high-resolution time-to-digital convertors [O] . Prinzie, Jeffrey, Christiansen, Jorgen, Moreira, Paulo, 2016
• 10. Standard Digital Data Clock-Rate Generator with Programmable Digital Phase Shift [R] . Spraitz, J. P., Hilwig, G. J. 1973

• 1. 具有容错能力的L1最优化半自动2D转3D [C] . 袁红星 ,安鹏 ,吴少群 . 宁波市第十届学术大会 . 2018
• 2. 机构投资者是否具有更准确的盈余信息定价能力? [A] . 王勇 . 2010