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Self-aligned contact (SAC) etching using polymer-building chemistry

机译:使用聚合物结构化学的自对准接触(SAC)蚀刻

摘要

A method for forming a via through a dielectric layer within a microelectronics fabrication. There is first provided a substrate employed within a microelectronics fabrication. There is then formed upon the substrate a pair of microelectronic structures. There is then formed sequentially upon the substrate including the pair of microelectronic structures a first conformal dielectric layer followed by a second conformal dielectric layer followed by a third dielectric layer, where the second conformal dielectric layer serves as an etch stop layer with respect to the third dielectric layer in a first plasma etch method employed in forming in part a via through the third dielectric layer, the second conformal dielectric layer and the first conformal dielectric layer at a location between the pair of microelectronic structures. The first plasma etch method employs an etchant gas composition which forms a passivating fluorocarbon polymer layer upon non-horizontal portions of the third dielectric layer, the second conformal dielectric layer and the first conformal dielectric layer. There is then formed upon the third dielectric layer a patterned photoresist layer which defines the location between the pair of structures to be formed the via through the third dielectric layer, the second conformal dielectric layer and the first conformal dielectric layer. There is then etched through the first plasma etch method the third dielectric layer and the second conformal dielectric layer to form a partial via while forming the passivating fluorocarbon polymer layer upon non-horizontal portions of the third dielectric layer, the second conformal dielectric layer and the first dielectric layer. Finally, there is then etched through a second plasma etch method the first conformal dielectric layer to form the via through the third dielectric layer, the second conformal dielectric layer and the first conformal dielectric layer.
机译:一种在微电子制造中形成穿过介电层的通孔的方法。首先提供在微电子制造中使用的衬底。然后在衬底上形成一对微电子结构。然后在包括一对微电子结构的衬底上依次形成第一共形介电层,然后是第二共形介电层,然后是第三介电层,其中,第二共形介电层相对于第三微介电层起蚀刻停止层的作用。第一等离子体蚀刻方法中的电介质层,其用于在所述一对微电子结构之间的位置处部分地形成穿过所述第三电介质层,所述第二保形电介质层和所述第一保形电介质层的通孔。第一等离子体蚀刻方法使用蚀刻剂气体组合物,其在第三介电层,第二保形介电层和第一保形介电层的非水平部分上形成钝化碳氟聚合物层。然后在第三电介质层上形成图案化的光致抗蚀剂层,该光致抗蚀剂层限定了将要形成的穿过第三电介质层,第二保形电介质层和第一保形电介质层的通路对之间的位置。然后通过第一等离子体蚀刻方法蚀刻第三介电层和第二共形介电层以形成部分通路,同时在第三介电层,第二共形介电层和第二介电层的非水平部分上形成钝化碳氟聚合物层。第一介电层。最后,然后通过第二等离子体蚀刻方法蚀刻第一共形介电层以形成穿过第三介电层,第二共形介电层和第一共形介电层的通孔。

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