A HIGH-SPEED ASYNCHRONOUS DECOMPRESSION CIRCUIT FOR VARIABLE-LENGTH-CODED DATA

摘要

There is provided an architecture and implementation of a high-speeddecompressionengine for variable-length-coded data, such as Huffman-coded data. The engineis particularlytargeted to processors where embedded programs are stored in compressed formanddecompressed at runtime during instruction cache refill. The decompressionengine uses aunique asynchronous variable decompression rate architecture to processvariable-length-codedinstructions. The resulting circuit is significantly smaller than comparablesynchronous decoders,yet has a higher throughput rate than almost all existing designs.