首页> 外国专利> Apparatus for generating test pattern for sequential logic circuit of integrated circuit and method thereof

Apparatus for generating test pattern for sequential logic circuit of integrated circuit and method thereof

机译:用于集成电路的顺序逻辑电路的生成测试图案的装置及其方法

摘要

In an apparatus for generating a test pattern for a sequential logic circuit including a plurality of storage elements each storage element storing a logical value of one bit wherein logical values of bits of the plurality of storage elements being represented by a state, first external input values are generated so that a transition process is performed from a second state of the plurality of storage elements to a first state thereof, and second external input values are generated so that a transition process is performed from a third state of the plurality of storage elements to the first state thereof. Thereafter, third external input values are generated so that a transition process is performed from a fourth state of the plurality of storage elements to the first state thereof. After setting the fourth state as the first state, name data of storage elements corresponding to bits of different states between the second and third states are stored in a storage unit. After setting the third state as the first state, there is increased a degree of requesting a scan operation for each of the storage elements, name data of which have been stored in the storage unit. Then, storage elements to be scanned are selected for generating an improved test pattern based on the degree of requesting the scan operation.
机译:在一种用于为包括多个存储元件的顺序逻辑电路生成测试图案的设备中,每个存储元件存储一个位的逻辑值,其中多个存储元件的位的逻辑值由状态表示,第一外部输入值产生第二输入值,从而执行从多个存储元件的第二状态到第一状态的转换处理,并且产生第二外部输入值,从而执行从多个存储元件的第三状态到第二存储元件的转换处理。其第一状态。此后,生成第三外部输入值,从而执行从多个存储元件的第四状态到其第一状态的转换过程。在将第四状态设置为第一状态之后,将与第二状态和第三状态之间的不同状态的位相对应的存储元件的名称数据存储在存储单元中。在将第三状态设置为第一状态之后,对于其名称数据已经存储在存储单元中的每个存储元件,请求扫描操作的程度增加。然后,基于请求扫描操作的程度来选择要扫描的存储元件以产生改进的测试图案。

著录项

  • 公开/公告号EP0727744B1

    专利类型

  • 公开/公告日1999-12-22

    原文格式PDF

  • 申请/专利权人 MATSUSHITA ELECTRIC IND CO LTD;

    申请/专利号EP19960107239

  • 发明设计人 MOTOHARA AKIRA;TAKEOKA SADAMI;

    申请日1992-04-14

  • 分类号G06F11/263;G06F11/273;

  • 国家 EP

  • 入库时间 2022-08-22 01:50:00

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