Substrate-triggering electrostatic discharge protection circuit for deep- submicron integrated circuits
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机译:用于深亚微米集成电路的触发衬底的静电放电保护电路
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摘要
A substrate-triggering ESD protection circuit is provided for use on a deep-submicron integrated circuit for ESD protection of the integrated circuit. The ESD protection circuit is incorporated between an input end and the internal circuit of the integrated circuit formed on a substrate. The ESD protection circuit utilizes a featured substrate- triggering operation to trigger the ESD-protection transistors formed in N-wells of the substrate into conducting state so as to bypass the ESD current to the ground. The ESD protection circuit allows a simplified semiconductor structure to fabricate, while nonetheless providing an increased level of ESD protection capability for the deep-submicron integrated circuit.
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