Gate control unit null of inverter for systematic run type

摘要

PURPOSE:To prevent pulse open-phase and generation of an unnecessary pulse in relation to disturbance such as a sudden change of a load in a gate control device of an inverter for system interconnection using a PLL circuit having a phase comparator, a loop filter, a voltage control oscillator and a counter provided in the gate control device. CONSTITUTION:A gate control device of an inverter for system interconnection wherein an adder 922 for adding up an output signal of a counter 92D constituting a PLL circuit and a phase operation signal PH1 is provided, the output signal of this adder 922 is sent to a phase comparator 92A and the output signal of the counter 92D is used as an output voltage phase signal Vphi.