HIGH SPEED OF VITERBI DECODER FOR MOBILE STATION USING PARALLEL ADD-COMPARE-SELECT CIRCUIT AND TRACEBACK STRUCTURE

摘要

PURPOSE: A high speed of a viterbi decoder for a mobile station using a parallel add-compare-select(ACS) circuit and a traceback structure is provided to carry out a high speed of decoding. CONSTITUTION: A high speed of a viterbi decoder for a mobile station using a parallel ACS circuit and a traceback structure is provided. A controller generates a plurality of the control signals for decoding. A data path decodes an input data responding to the control signals generated from the controller. The data path includes a branch matric calculation circuit for calculating a branch matric, an ACS circuit and a traceback structure, wherein the ACS circuit and traceback structure have a parallel structure allowing to process the operations for a plurality of states and a plurality of stages together. Therefore, the viterbi decoder for a mobile station carries out a high speed of decoding operation.