Non-volatile Semiconductor Memory and Floating Gate Transistor Programming Method Using EEPROM Cell Structure Used as Erasable and Programmable Semiconductor Memory

摘要

A transistor comprising a semiconductor substrate comprising a source region, a channel and a drain region, a floating polysilicon gate 16 extending over a portion of the channel having a thin oxide layer therebetween, wherein the floating gate 16 One extension is insulated from the semiconductor substrate 11. The control gate 17 extends over a portion of the floating gate 16 from the source region to the drain region through the dielectric oxide layer. The program gate 19 extends over the floating extension 18 through a dielectric oxide layer to form an electrical capacitor with the floating gate extension, and the program gate 19 and the control gate 17. Have side edges facing away from each other.