首页> 外国专利> High-speed digital circuit employing a band-zero-determination-aside (Bamp;Oslash;DA) architecture

High-speed digital circuit employing a band-zero-determination-aside (Bamp;Oslash;DA) architecture

机译:高速数字电路,采用零频带确定(BØ DA)架构

摘要

A system and a method for calculating a value for the “Band Zero” (B∅) contribution to the processing of a digital signal by processing the separate parts of the signal at separate times. The method increases operating speed of a feedback circuit, for example, by providing a processing path (402f) that is not on the main high-speed processing path of a system such as a read channel of a disk drive. By processing the most time-consuming determination “in parallel,” the high-speed portion of processing is able to maintain an optimum throughput. The method also lends itself to processing in those applications where more than one mode is used. For example, when used in a read channel (113) of a disk drive (100) employing a FIR filter, three modes are desired: FIR-bypass, acquisition, and data tracking. Being able to switch easily among the three modes provided for in a read channel (113) of a disk drive (100) demonstrates the adaptability of the method and supporting structure to a broad class of feedback circuits used in systems employing high throughput rates.
机译:用于计算“带零”值的系统和方法。 (B∅)通过在不同的时间处理信号的各个部分来对数字信号的处理做出贡献。该方法例如通过提供不在系统的主要高速处理路径上的处理路径( 402 f )来提高反馈电路的工作速度例如磁盘驱动器的读取通道。通过并行处理最耗时的确定“处理的高速部分能够保持最佳吞吐量。该方法还适用于使用多个模式的那些应用程序中的处理。例如,在使用FIR滤波器的磁盘驱动器( 100 )的读取通道( 113 )中使用时,需要三种模式:FIR旁路,获取和数据跟踪。能够轻松地在磁盘驱动器( 100 )的读取通道( 113 )中提供的三种模式之间切换,证明了该方法和支持结构对磁盘的适应性。在采用高吞吐速率的系统中使用的反馈电路种类繁多。

著录项

  • 公开/公告号US6191716B1

    专利类型

  • 公开/公告日2001-02-20

    原文格式PDF

  • 申请/专利权人 TEXAS INSTRUMENTS INCORPORATED;

    申请/专利号US19990322671

  • 发明设计人 ROBERT B. STASZEWSKI;

    申请日1999-05-28

  • 分类号H03M16/20;

  • 国家 US

  • 入库时间 2022-08-22 01:05:06

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