InP-based heterojunction bipolar transistor with reduced base-collector capacitance

摘要

A heterojunction bipolar transistor based on the InP/InGaAs materials family and its method of making. An n-type collector layer, principally composed of InP is epitaxially grown on an insulating InP substrate by vapor phase epitaxy. The collector layer is then laterally defined into a stack, and semi-insulating InP is regrown around the sides of the stack to the extent that it planarizes with the stack top. The semi-insulating InP electrically isolates the collector stack. A thin base layer of p-type InGaAs, preferably lattice matched to InP, is grown over the collector stack, and n-type emitter layer is grown over the base layer. A series of photolithographic steps then defines a small emitter stack and a base that extends outside of the area of the emitter and collector stacks. The reduced size of the interface between the base and the collector produces a lower base-collector capacitance and hence higher speed of operation for the transistor.