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VERTICAL HETEROJUNCTION BIPOLAR TRANSISTORS WITH REDUCED BASE-COLLECTOR JUNCTION CAPACITANCE

机译:垂直异质结双极晶体管,基极-结间电容减小

摘要

Vertical heterojunction bipolar transistors with reduced base-collector junction capacitance, as well as fabrication methods for vertical heterojunction bipolar transistors and design structures for BiCMOS integrated circuits. The vertical heterojunction bipolar transistor includes a barrier layer between the intrinsic base and the extrinsic base that blocks or reduces diffusion of a dopant from the extrinsic base to the intrinsic base. The barrier layer has at least one opening that permits direct contact between the intrinsic base and a portion of the extrinsic base disposed in the opening.
机译:具有减小的基极-集电极结电容的垂直异质结双极晶体管,以及垂直异质结双极晶体管的制造方法和BiCMOS集成电路的设计结构。垂直异质结双极晶体管包括在本征基极和非本征基极之间的阻挡层,该阻挡层阻止或减少掺杂剂从非本征基极到本征基极的扩散。阻挡层具有至少一个开口,该开口允许本征基底与布置在该开口中的非本征基底的一部分之间直接接触。

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