Method and apparatus for a digitally controlled constant current source for phase adjustment of a synthesized clock

摘要

An apparatus for adjusting the phase difference of a first clock signal (48) and a second clock (50) is disclosed. The apparatus includes a phase indicator (42) which receives a first clock signal (48) and a second clock signal (50) and determines a phase relationship. A microprocessor (44) outputs a digital value related to the phase relationship. An analog to digital converter (46) receives the digital value and outputs an analog value based on the digital signal. After that a voltage controlled constant current source (47) receives the analog value and outputs a constant current source proportional to the analog value. Finally, a phase lock loop circuit (10) receives the constant current source and adjusts the phase relationship.