A lateral, asymmetric lightly doped drain MOSFET that allows for a higher packing density, reduced on-resistance and protection from voltage punch through and many short channel effects. The lateral, asymmetric lightly doped drain MOSFET includes a semiconductor surface having a first surface and a second surface, a substantially uniformly doped source region disposed at the first surface of the substrate, a drain region disposed at the first surface of the substrate defining a channel region between the source region and the drain region, a gate dielectric material disposed on the first surface of the semiconductor and a gate disposed atop the gate dielectric material. The drain region includes a first doped section and a second doped section. The second doped section is located adjacent to the channel region and is more lightly doped than the first doped section of the drain region.
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