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MANUFACTURING METHOD OF SOIMOSFET

机译:SOIMOSFET的制造方法

摘要

PURPOSE: To provide a highly reliable SOI MOSFET which suppresses the influence of the thickness of a surface semiconductor layer on the electric properties while effectively reducing short channel effects, punch through, etc., and its manufacturing method. CONSTITUTION: In the SOI MOSFET which is composed of first conductivity channel regions P1-P3 made on the surface semiconductor layer arranged on an insulating substrate and depleted completely, a second conductivity source/ drain region 10 arranged across the channel regions, and a gate electrode 8 made through a gate insulating film 7 on the channel region, the channel region consists of the channel central regions P2 and the channel edge regions P1 and P3 which adjoin severally the source/drain regions 10 and where the concentration of impurities is set higher than that of the channel central region, and in the manufacturing method for the SOI MOSFET, both threshold voltages are set so that the change of the threshold voltage Vtho in the channel central region to the change of thickness of the surface semiconductor layer and the change of the threshold voltage Vthedge in the channel edge regions to the change of the thickness of the surface semiconductor layer may be a reverse code.
机译:目的:提供一种高度可靠的SOI MOSFET及其制造方法,该MOSFET可以抑制表面半导体层的厚度对电性能的影响,同时有效地减少短沟道效应,穿通等。组成:在SOI MOSFET中,该SOI MOSFET由在绝缘衬底上的表面半导体层上制成并完全耗尽的第一导电沟道区P1-P3,横跨沟道区布置的第二导电源/漏区10和栅电极组成如图8所示,通过在沟道区上通过栅绝缘膜7制成,沟道区由沟道中心区P2和沟道边缘区P1和P3组成,沟道中心区P2和沟道边缘区P1和P3分别邻接源/漏区10,并且其中杂质的浓度设定为高于并且,在SOI MOSFET的制造方法中,设定两个阈值电压,以使沟道中心区域的阈值电压Vtho的变化与表面半导体层的膜厚的变化,以及沟道中心区域的阈值电压的变化对应。沟道边缘区域中与表面半导体层的厚度变化有关的阈值电压Vthedge可以是反码。

著录项

  • 公开/公告号KR20020064674A

    专利类型

  • 公开/公告日2002-08-09

    原文格式PDF

  • 申请/专利权人 SHARP CORPORATION;

    申请/专利号KR20020005851

  • 发明设计人 ADAN ALBERT OSCAR;

    申请日2002-02-01

  • 分类号H01L29/78;

  • 国家 KR

  • 入库时间 2022-08-22 00:30:32

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