DESIGN SYSTEM FOR SEMICONDUCTOR INTEGRATED CIRCUIT ELEMENT, PROGRAM, RECORDING MEDIUM, AND DESIGN METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT ELEMENT

摘要

PPROBLEM TO BE SOLVED: To easily design a semiconductor integrated circuit element having a decoupling capacitor. PSOLUTION: An input and output block 110 is arranged in an element area serving as an IC chip, and an analogue signal circuit block 120 and the like are arranged therein. Unit capacity cells 10a are arranged lattice-likely in a capacity insertion area 160 and the like within an unoccupied area 115 not belonging to the areas. An analog wiring 170 is arranged between the input and output block 110 and the analogue signal circuit block 120 or the like, and the unit capacity cells 10a in the capacity insertion area 160 are connected to an electric power source and wirings 171, 172 of a GND potential by veer conductors 173, 174. Unit cells 180 are arranged thereafter, and wirings 190 are arrange to conduct inter-unit-cell connection and to connect the input and output block 110 to a memory block 140 or the like. The unit capacity cells 10a in the capacity insertion area 160 and the like are connected to the electric power source and GND wirings 191, 192 by the veer conductors. PCOPYRIGHT: (C)2003,JPO