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System and method of placing components for minimizing wire congestion and wire length in performing a function

机译:放置用于最小化执行功能中的电线拥塞和电线长度的组件的系统和方法

摘要

A system and method is provided of placing components on a chip for performing a function in order to minimize wire length and wire congestion. In a preferred embodiment of the present invention, a plurality of components, which are adapted to receive a plurality of bits, are arranged in lines that are substantially parallel to one another. Within each line, the components are arranged such that the component adapted to receive the least-significant bit (LSB) for that line is positioned at a first end of the line, and a component adapted to receive the most-significant bit (MSB) for that line is positioned at a second end of the line. The lines are then oriented such that the first end of all odd numbered lines are adjacent the second end of all even-numbered lines (i.e., in a serpentine fashion). The plurality of components are then electrically connected. In one embodiment of the present invention, each component is electrically connected to a next-least-significant component and a similarly-positioned component from the next-least-significant similarly-oriented line through a wire. In another embodiment of the present invention, each component is electrically connected to a next-most-significant component and a similarly-positioned component from the next-most-significant similarly-oriented line.
机译:提供了一种将部件放置在芯片上以执行功能的系统和方法,以最小化导线长度和导线拥塞。在本发明的一个优选实施例中,适于接收多个比特的多个组件被布置在基本上彼此平行的行中。在每条线内,布置这些组件,使得适合于接收该行的最低有效位(LSB)的组件位于该行的第一端,而适合于接收最高有效位(MSB)的组件该线位于该线的第二端。然后,将这些线定向成使得所有奇数线的第一端与所有偶数线的第二端相邻(即,以蛇形方式)。然后将多个部件电连接。在本发明的一个实施例中,每个部件通过导线电连接到次最低有效部件和来自次最低有效相似取向线的相似位置的部件。在本发明的另一个实施例中,每个部件从次要的相似取向的线电连接至次要的重要部件和相似位置的部件。

著录项

  • 公开/公告号US2003115565A1

    专利类型

  • 公开/公告日2003-06-19

    原文格式PDF

  • 申请/专利权人 SUN MICROSYSTEMS INC.;

    申请/专利号US20010023007

  • 发明设计人 LEONARD D. RARICK;

    申请日2001-12-17

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-22 00:11:23

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