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Partitionable embedded circuit test system for integrated circuit
Partitionable embedded circuit test system for integrated circuit
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机译:集成电路的可分区嵌入式测试系统
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摘要
A flexible built-in self-test (BIST) circuit is incorporated into an integrated circuit (IC) for testing one or random access memories or other memories embedded in an integrated circuit regardless of the number, size or test requirements of the memories. Input data from a controller that may be conveniently partitioned among components internal and external to the IC, supplies data to the BIST circuit indicating the size of the embedded memories to be tested and selecting from among several modes of BIST operation.
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