Techniques for analyzing circuit designs based on assertions. An assertion is associated with a circuit structure from the circuit design. The assertion specifies a context of the circuit design in which the circuit structure is to be analyzed, an attribute associated with the circuit structure, and a constraint associated with the attribute. The present invention analyzes the circuit design based on assertions and checks to identify one or more instances of the circuit structure in the circuit design which do not satisfy the constraint specified in the assertion. An assertion may also indicate an action to be performed if the circuit structure does not satisfy the constraint specified in the assertion.
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