首页> 外国专利> method of forming cavities in a multilayer circuit board using low temperature cofired ceramic on metal a mold therefor and a multilayer circuit board manufactured thereby

method of forming cavities in a multilayer circuit board using low temperature cofired ceramic on metal a mold therefor and a multilayer circuit board manufactured thereby

机译:于金属上使用低温共烧陶瓷的金属在其上形成模具的多层电路板中形成空腔的方法以及由此制造的多层电路板

摘要

PURPOSE: A method and a mold for forming cavities of a multi-layer PCB and a multi-layer PCB manufactured by the same are provided to allow for ease of mounting of chips, while achieving improved stability of signal processing. CONSTITUTION: A method comprises the first step of sequentially stacking the first green tape layer(93) and/or a metal substrate(90) on second and third green tape layers(91,92); the second step of inserting protrusions(81,82) of a mold(80) corresponding to cavities(71,72), into the cavities, and mounting the mold made of a thermoplastic resin on the second and third green tape layers; and the third step of performing an isotropic colamination, to thereby achieve improved perpendicularity at the edges of the cavities and flatness of the bottoms of the cavities.
机译:用途:提供一种用于形成多层PCB的腔体的方法和模具以及由其制造的多层PCB,以允许容易地安装芯片,同时实现改善的信号处理的稳定性。组成:一种方法,包括以下步骤:在第二和第三生带层(91,92)上依次堆叠第一生带层(93)和/或金属基板(90);第二步是将与模腔(71,72)相对应的模具(80)的突起(81,82)插入模腔中,并将由热塑性树脂制成的模具安装在第二和第三生带层上。第三步是进行各向同性层合,从而在型腔的边缘实现改进的垂直度,并在型腔底部形成平坦度。

著录项

  • 公开/公告号KR20030039464A

    专利类型

  • 公开/公告日2003-05-22

    原文格式PDF

  • 申请/专利权人 ORION ELECTRIC CO. LTD.;

    申请/专利号KR20010070400

  • 发明设计人 CHOI HYE JEONG;JUN JONG IN;

    申请日2001-11-13

  • 分类号H05K3/00;

  • 国家 KR

  • 入库时间 2022-08-21 23:47:06

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