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Process to improve the Vss line formation for high density flash memory and related structure associated therewith

机译:改进用于高密度闪存的Vss线形成的工艺及其相关结构

摘要

One aspect of the invention relates to a method of a NOR-type flash memory and associated structure which comprises forming a flash memory array on a semiconductor substrate in a core region of the flash memory. The flash memory array comprises a plurality of flash memory cells which each have a source region and a drain region in the semiconductor substrate. A first portion of a first dielectric layer is formed over the flash memory array, and contact holes in the first dielectric layer are formed down to source regions of flash memory cells in the core region. A trench is then formed in the first dielectric layer and extends between the two contact holes. The contact holes and trench are then filled with a conductive material, thereby electrically coupling together the source regions of the two flash memory cells. A second portion of the first dielectric layer is then formed over the first portion of the first dielectric layer and the trench, thereby embedding the source contacts and trench in within the first dielectric layer.
机译:本发明的一个方面涉及一种NOR型闪存的方法及其相关结构,该方法包括在闪存的核心区域中的半导体衬底上形成闪存阵列。闪存阵列包括多个闪存单元,每个闪存单元在半导体衬底中具有源极区和漏极区。第一电介质层的第一部分形成在闪存阵列上方,并且第一电介质层中的接触孔向下形成至核心区域中的闪存单元的源极区域。然后在第一介电层中形成沟槽,该沟槽在两个接触孔之间延伸。然后用导电材料填充接触孔和沟槽,从而将两个闪存单元的源极区域电耦合在一起。然后,在第一介电层的第一部分和沟槽上方形成第一介电层的第二部分,从而将源极触点和沟槽嵌入第一介电层内。

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