In a logic simulation method, one of an algorithm level simulation and a register transfer level simulation is executed. The algorithm level simulation corresponds to an algorithm level description and the register transfer level simulation corresponds to a register transfer level description. The simulation is switched from one of the algorithm level simulation and the register transfer level simulation into the other in response to a switching instruction using a relation between states of the algorithm level description and states of the register transfer level description. The algorithm level description is associated with arithmetic and logic algorithm and not associated with logic circuits. The register transfer level description is associated with logic circuits.
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