首页>
外国专利>
LOGIC SIMULATION MODEL OF INPUT/OUTPUT CIRCUIT, LOGIC SIMULATION, AND LOGIC SIMULATION METHOD
LOGIC SIMULATION MODEL OF INPUT/OUTPUT CIRCUIT, LOGIC SIMULATION, AND LOGIC SIMULATION METHOD
展开▼
机译:输入输出电路的逻辑仿真模型,逻辑仿真及逻辑仿真方法
展开▼
页面导航
摘要
著录项
相似文献
摘要
PROBLEM TO BE SOLVED: To provide a logic simulation model of an input/output circuit which incorporates a terminating resistance which checks ODT (On Die Termination) operation of a logic circuit where the input/output circuit is used in logic simulation.;SOLUTION: A logical value "X2 (indefinite value)" whose signal intensity is a strength level "5" is added to an output expected value of a conventional logic simulation model. A logic simulation model 10 of a terminal mounting input/output circuit 30a, in ODT confirmation mode, where an ODT signal St whose logical values are "1" and "0" is input to a terminating resistance part 12, outputs an external input/output signal of the logical value "X2 (indefinite value)" and "Z (high impedance)", from an input/output terminal Tio to an input/output circuit of the other semiconductor device, to express ODT operation.;COPYRIGHT: (C)2010,JPO&INPIT
展开▼