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Integration of fully depleted and partially depleted field effect transistors formed in SOI technology
Integration of fully depleted and partially depleted field effect transistors formed in SOI technology
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机译:集成以SOI技术形成的完全耗尽和部分耗尽的场效应晶体管
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摘要
For fabricating field effect transistors with a semiconductor substrate in SOI (semiconductor on insulator) technology, a first hardmask is formed on a first area of the semiconductor substrate, and a first dielectric forming dopant is implanted into a second area of the semiconductor substrate that is not covered by the first hardmask. The first hardmask is removed from the first area of the semiconductor substrate. A second hardmask is formed on the second area of the semiconductor substrate, and a second dielectric forming dopant is implanted into the first area of the semiconductor substrate that is not covered by the second hardmask. A thermal anneal is performed to form a first buried insulating structure from the second dielectric forming dopant reacting within the first area of the semiconductor substrate and to form a second buried insulating structure from the first dielectric forming dopant reacting within the second area of the semiconductor substrate. A first semiconductor structure remains on top of the first buried insulating structure and has a different thickness from a second semiconductor structure remaining on top of the second buried insulating structure.
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