A system and method for synchronizing a number of specialized circuits or application-specific integrated circuits to a common timing standard is provided. The system includes a first communications device including at least first and second type communication paths which is configured to receive first and second timing signals in the first type communications path and to transmit data on the second type communications path. The data is transmitted in association with the received first timing signal. A controller or signal processor element is coupled to the first device and configured to receive the second timing signal and produce a timing word therefrom. A second communications device is coupled to the processor and configured to receive the second timing signal and produce a timing word therefrom. The second communications. device receives the timing word and the transmitted data and derives synchronization information therefrom. The derived synchronization information is related to the first timing signal. The second communications device performs one or more operations in accordance with the received second timing signal and the derived synchronization information.
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