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Process for epitaxy on a silicon substrate containing zones highly doped with arsenic
Process for epitaxy on a silicon substrate containing zones highly doped with arsenic
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机译:在包含高度掺杂砷的区域的硅基板上进行外延的工艺
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摘要
In a process for gas phase epitaxial deposition of silicon on a silicon substrate having doped zones of high arsenic concentration, self-doping of the epitaxial layer with arsenic is avoided by (a) carrying out a first thin epitaxial deposition (t5-t6) and subsequent anneal (t6-t3) under conditions and for a time such that the arsenic diffusion length is much less than the deposited layer thickness; and (b) carrying out a second epitaxial deposition (t3-t4) to achieve the desired layer thickness. Preferably, step (a) is carried out at 1100 degrees C for a time to achieve 40-60 nm thickness and step (b) is carried out at 1050 degrees C.
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