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METHOD AND APPARATUS FOR TRANSMIT TIMING ADJUSTMENT IN A HOST-PROCESSOR-BASED MODEM

机译:基于主机处理器的调制解调器中的传输时序调整的方法和装置

摘要

During operation a transmitter and receiver of a central site termination unit (TU-C) (101) are driven by a sample clock derived from a network clock source (103). A remote termination unit (TU-R) (102) operates with a free running sampling clock and acquires and tracks the network clock (103) from a downstream signal (104). The regenerated network clock is then used to drive both the receiver (107) and the transmitter (108) of the TU-R (102). In particular, the transmit samples are generated on a block by block basis using fast algorithms. To avoid glitches during data transmission caused by block processing, the data sample at the boundary of blocks of data is replaced by an interpolated value. In particular, a first order approximation to the correct value of the boundary sample is made, and the first order approximation is substituted in place of the boundary data sample of the block.
机译:在操作期间,中央站点终端单元(TU-C)(101)的发送器和接收器由源自网络时钟源(103)的采样时钟驱动。远程终端单元(TU-R)(102)以自由运行的采样时钟进行操作,并从下游信号(104)获取并跟踪网络时钟(103)。然后,再生的网络时钟被用于驱动TU-R(102)的接收器(107)和发送器(108)。特别地,使用快速算法在逐块的基础上生成发送样本。为了避免在数据传输过程中由于块处理引起的毛刺,将数据块边界处的数据样本替换为内插值。特别地,对边界样本的正确值进行一阶近似,并且代替块的边界数据样本来替代一阶近似。

著录项

  • 公开/公告号EP1219061A4

    专利类型

  • 公开/公告日2004-10-06

    原文格式PDF

  • 申请/专利权人 MOTOROLA INC.;

    申请/专利号EP20000955667

  • 发明设计人 YANG JIAN;

    申请日2000-08-17

  • 分类号H04L27/26;H04L5/14;H04L7/02;

  • 国家 EP

  • 入库时间 2022-08-21 22:55:37

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