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VITERBI DECODING WITH PATH METRIC UPDATE IMPLEMENTED IN THE ORDER OF BIT-SLICES

机译:在位片序中实施具有路径度量值更新的维特比解码

摘要

The invention concerns a bit-slice implementation of the ACS operation for a Viterbi decoder suitable for software implementations on digital computers. At first bit-slice is formed as a single word containing the LSBs of the path metrics for all states, a second bit slice is formed with the next most significant bits, and so on until the MSB bit-slice. The adding of the ACS operation is performed in units of bit-slices, starting with the additions involving the LSBs of the path metrics. Moreover, the comparison part of the ACS operation is performed using substractions in units of bit-slices. Thus, the invention enables the path metrics for all states to be updated simultaneously and offers speed improvements over the known prior art techniques. In order to further increase the processing speed, only one bank of path metrics is used.
机译:本发明涉及用于维特比解码器的ACS操作的位片实现,该维特比解码器适合于数字计算机上的软件实现。首先,将位片形成为包含所有状态的路径量度的LSB的单个字,然后使用下一个最高有效位形成第二位片,依此类推,直到MSB位片为止。 ACS操作的添加以位片为单位执行,从涉及路径量度的LSB的添加开始。而且,ACS操作的比较部分是使用减法以位片为单位执行的。因此,本发明使得能够同时更新所有状态的路径量度,并且提供了相对于已知现有技术的速度改进。为了进一步提高处理速度,仅使用一组路径量度。

著录项

  • 公开/公告号EP1295401B1

    专利类型

  • 公开/公告日2004-01-07

    原文格式PDF

  • 申请/专利权人 ADVANCED RISC MACH LTD;

    申请/专利号EP20010902548

  • 发明设计人 FRANCIS HEDLEY JAMES;SYMES DOMINIC HUGO;

    申请日2001-02-02

  • 分类号H03M13/41;

  • 国家 EP

  • 入库时间 2022-08-21 22:54:57

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