首页> 外国专利> Circuit and method of compensating voltage drop of internal power voltage for cell array in semiconductor memory device

Circuit and method of compensating voltage drop of internal power voltage for cell array in semiconductor memory device

机译:补偿半导体存储器件中的单元阵列的内部电源电压的压降的电路和方法

摘要

PURPOSE: A circuit for compensating the voltage drop of an inner power voltage for a cell array in a semiconductor memory device and a method for compensating the voltage drop are provided to satisfy the requirement for the low power voltage and the requirement for the high power voltage. CONSTITUTION: A circuit for compensating the voltage drop of an inner power voltage for a cell array in a semiconductor memory device includes a pull-up driver and a pulse width control circuit(420). The pull-up driver pulling up the inner power voltage level for the cell array to an external power voltage level in response to the pulse width. And, the pulse width control circuit(420) controls the pulse width of the pulse signal in response to the level detection signal. The level detection signal is capable of shifting the logic state in response to the sense control signal to control the sensing of the data stored at the memory cell and the external power voltage.
机译:目的:提供用于补偿半导体存储器件中的单元阵列的内部电源电压的电压降的电路和用于补偿电压降的方法,以满足对低电源电压的要求和对高电源电压的要求。构成:一种用于补偿半导体存储器件中单元阵列的内部电源电压的压降的电路,包括上拉驱动器和脉冲宽度控制电路(420)。上拉驱动器响应于脉冲宽度将单元阵列的内部电源电压电平上拉至外部电源电压电平。并且,脉冲宽度控制电路(420)响应于电平检测信号来控制脉冲信号的脉冲宽度。电平检测信号能够响应于感测控制信号而改变逻辑状态,以控制对存储在存储单元上的数据和外部电源电压的感测。

著录项

  • 公开/公告号KR20030094568A

    专利类型

  • 公开/公告日2003-12-18

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号KR20020031409

  • 发明设计人 CHUN GI CHEOL;HONG SANG PYO;

    申请日2002-06-04

  • 分类号G11C5/14;

  • 国家 KR

  • 入库时间 2022-08-21 22:50:45

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