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VOLTAGE DROP CIRCUIT, INTERNAL POWER SOURCE VOLTAGE LEVEL CONTROL METHOD USING THE SAME, AND ITS SEMICONDUCTOR MEMORY DEVICE
VOLTAGE DROP CIRCUIT, INTERNAL POWER SOURCE VOLTAGE LEVEL CONTROL METHOD USING THE SAME, AND ITS SEMICONDUCTOR MEMORY DEVICE
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机译:电压降电路,使用该电压降电路的内部电源电压电平控制方法及其半导体存储器
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摘要
PROBLEM TO BE SOLVED: To provide a voltage drop circuit for preventing reduction in writing speed and malfunction of a memory device and eliminating unnecessary power consumption, and further provide an internal power source voltage level control method utilizing this voltage drop circuit and its semiconductor memory device. SOLUTION: This voltage drop circuit includes: a comparison controller 30 for comparing a reference voltage Vref with a voltage level of an internal power source voltage Vint lowered by a first writing operation of a writing driver in response to a write enable signal WE; and a first switching element 40 which is activated by a first control signal S1 to be output in response to the comparison result and controls the voltage level of the internal power source voltage. Further provided are: control means 50 for generating a second control signal S2 to be activated during a response time period required until the operation of the first switching element 40 from the first writing operation of the writing driver; and a second switching element 60 for supplying the external power source voltage as the internal power source voltage during a time period when the second control signal S2 is being activated.
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