首页> 外国专利> SEMICONDUCTOR DEVICE TO IMPROVE COHERENCE BETWEEN BONDING PAD AND SECOND INTERCONNECTION LAYER OR INSULATION LAYER AND PREVENT CRACK FROM BEING GENERATED IN INSULATION LAYER BETWEEN BONDING PAD AND SECOND INTERCONNECTION

SEMICONDUCTOR DEVICE TO IMPROVE COHERENCE BETWEEN BONDING PAD AND SECOND INTERCONNECTION LAYER OR INSULATION LAYER AND PREVENT CRACK FROM BEING GENERATED IN INSULATION LAYER BETWEEN BONDING PAD AND SECOND INTERCONNECTION

机译:半导体装置,用于提高键合焊盘和第二个互连层或绝缘层之间的一致性,并防止裂纹在键合焊盘和第二个互连之间的绝缘层中产生

摘要

PURPOSE: A semiconductor device is provided to improve coherence between a bonding pad and the second interconnection layer or an insulation layer and prevent a crack from being generated in an insulation layer between the bonding pad and the second interconnection layer even if stress is applied to the bonding pad by forming the bonding pad on the active region of a semiconductor substrate. CONSTITUTION: A semiconductor device is formed on a semiconductor substrate. The first interconnection layer is formed over an operation region of the semiconductor substrate in which the semiconductor device is formed, electrically connected to the operation region. The second interconnection layer(2) is formed over the first interconnection layer on the semiconductor substrate. For an electrical connection with an outer connection terminal, a bonding pad(1) is formed on the second interconnection layer on the substrate while at least a part of the bonding pad is positioned right over the operation region. The second interconnection layer has a plurality of interconnections in a region right under the bonding region. One of the plurality of interconnections is connected to the bonding pad, and an insulation layer(5) is formed between the other of the plurality of interconnections and the bonding pad.
机译:目的:提供一种半导体器件,以提高键合焊盘和第二互连层或绝缘层之间的相干性,并且即使应力施加到键合焊盘和第二互连层之间的绝缘层中,也可以防止裂纹在键合焊盘和第二互连层之间的绝缘层中产生通过在半导体衬底的有源区上形成键合焊盘来形成键合焊盘。构成:在半导体衬底上形成半导体器件。第一互连层形成在其中形成有半导体器件的半导体衬底的操作区域上方,并电连接到该操作区域。第二互连层(2)形成在半导体衬底上的第一互连层上方。为了与外部连接端子进行电连接,在基板上的第二互连层上形成焊盘(1),同时将焊盘的至少一部分设置在操作区域的正上方。第二互连层在接合区域正下方的区域中具有多个互连。多个互连中的一个互连到焊盘,并且在多个互连中的另一个与焊盘之间形成绝缘层(5)。

著录项

  • 公开/公告号KR20040087961A

    专利类型

  • 公开/公告日2004-10-15

    原文格式PDF

  • 申请/专利权人 SHARP CORPORATION;

    申请/专利号KR20040024333

  • 发明设计人 SUZUKI TAKEHIRO;

    申请日2004-04-09

  • 分类号H01L21/60;

  • 国家 KR

  • 入库时间 2022-08-21 22:47:50

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