首页> 外国专利> SEMICONDUCTOR DEVICE HAVING HETERO GRAIN STACK GATE AND METHOD OF FORMING THE SAME

SEMICONDUCTOR DEVICE HAVING HETERO GRAIN STACK GATE AND METHOD OF FORMING THE SAME

机译:具有杂粮堆叠门的半导体器件及其形成方法

摘要

A semiconductor device includes a hetero grain stack gate (HGSG). The device includes a semiconductor substrate having a surface, a gate insulating layer formed over the surface of the semiconductor substrate, and a gate electrode formed over the gate insulating layer, wherein the gate electrode includes a lower poly-SiGe layer having a columnar crystalline structure, and an upper poly-Si layer having a random crystalline structure. In one embodiment, the gate electrode includes a lower poly-SiGe layer having a columnar crystalline structure, an intermediate layer having an random crystalline structure, and an upper poly-Si layer having a columnar crystalline structure. A method of manufacturing a semiconductor device having an HGSG comprises depositing a gate insulating layer over a surface of a semiconductor substrate, depositing a lower poly-SiGe layer having a columnar crystalline structure over the gate insulating layer, depositing an amorphous Si layer over the lower poly-SiGe layer, and crystallizing the amorphous Si layer to obtain an upper poly-Si layer having a random crystalline structure.
机译:半导体器件包括异质堆叠栅(HGSG)。该器件包括:具有表面的半导体衬底;在半导体衬底的表面上方形成的栅极绝缘层;以及在栅极绝缘层上方形成的栅电极,其中,栅电极包括具有柱状晶体结构的下部多晶硅层。以及具有随机晶体结构的上多晶硅层。在一个实施例中,栅电极包括具有柱状晶体结构的下部多晶硅层,具有无规晶体结构的中间层和具有柱状晶体结构的上部多晶硅层。制造具有HGSG的半导体器件的方法包括:在半导体衬底的表面上沉积栅极绝缘层;在栅极绝缘层上方沉积具有柱状晶体结构的下部多晶硅层;在下部绝缘层上方沉积非晶硅层。多晶硅层,然后使非晶硅层结晶以获得具有随机晶体结构的上部多晶硅层。

著录项

  • 公开/公告号KR100437459B1

    专利类型

  • 公开/公告日2004-06-23

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20020025008

  • 申请日2002-05-07

  • 分类号H01L21/8238;

  • 国家 KR

  • 入库时间 2022-08-21 22:47:01

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