首页> 外国专利> Design and manufacture procedure for semiconductor memory building blocks involves designing first and second layouts and using one layout for entire design layout

Design and manufacture procedure for semiconductor memory building blocks involves designing first and second layouts and using one layout for entire design layout

机译:半导体存储器构建块的设计和制造过程涉及设计第一和第二布局,并对整个设计布局使用一个布局

摘要

The design and manufacture procedure is especially for DRAM (Dynamic Random Access Memory) building blocks (1). It involves designing first and second layouts after which one building block layout may be used for the entire design layout. The block has an address input division module (9) with address input pads (9a-9d). Several layouts (9'-9''') for the input division module may be produced. There is a memory module (2) at the other end of the circuit block, connected to data input terminals (2a-2d). several layouts (2'-2''') for the memory module may be produced. the circuit includes a quadratic matrix of memory banks (3a-3d).
机译:设计和制造过程尤其适用于DRAM(动态随机存取存储器)构造块(1)。它涉及设计第一和第二布局,然后可以将一个构件块布局用于整个设计布局。该模块具有一个带有地址输入焊盘(9a-9d)的地址输入划分模块(9)。可以为输入分割模块生成几种布局(9'-9''')。在电路块的另一端有一个存储模块(2),连接到数据输入端子(2a-2d)。可以为存储模块生成几种布局(2'-2''')。该电路包括存储库(3a-3d)的二次矩阵。

著录项

  • 公开/公告号DE10245037A1

    专利类型

  • 公开/公告日2004-04-08

    原文格式PDF

  • 申请/专利权人 INFINEON TECHNOLOGIES AG;

    申请/专利号DE2002145037

  • 发明设计人 SCHOLL STEFAN;

    申请日2002-09-26

  • 分类号H01L21/8239;

  • 国家 DE

  • 入库时间 2022-08-21 22:43:54

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