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Deterministic coherence protocol for distributed multi cache - memory

机译:分布式多缓存的确定性一致性协议

摘要

An efficient streamlined coherent protocol for a multi- processor multi- cache computing system. Each subsystem includes at least one processor and an associated cache and directory. The subsystems are coupled to a global interconnect via global interfaces. In one embodiment, each global interface includes a request agent (RA), a directory agent (DA) and a slave agent (SA). The RA provides a subsystem with a mechanism for sending read and write request to the DA of another subsystem. The DA is responsible for accessing and updating its home directory. The SA is responsible for responding to requests from the DA of another subsystem. Each subsystem also includes a blocker coupled to a DA and associated with a home directory. All requests for a cache line are screened by the blocker associated with each home directory. Blockers are responsible for blocking new request(s) for a cache line until an outstanding request for that cache line has been serviced. A "locked" state managed by the blocker greatly reduces corner cases and simplifies solutions in the few remaining corner cases.
机译:用于多处理器多高速缓存计算系统的有效的简化连贯协议。每个子系统包括至少一个处理器以及相关联的高速缓存和目录。子系统通过全局接口耦合到全局互连。在一个实施例中,每个全局接口包括请求代理(RA),目录代理(DA)和从代理(SA)。 RA为子系统提供了一种机制,用于向另一子系统的DA发送读写请求。 DA负责访问和更新其主目录。 SA负责响应另一个子系统的DA的请求。每个子系统还包括耦合到DA并与主目录关联的阻止程序。与每个主目录关联的阻止程序将筛选对缓存行的所有请求。阻止程序负责阻止对缓存行的新请求,直到为该缓存行的未完成请求提供服务为止。阻止程序管理的“锁定”状态大大减少了极端情况,并简化了其余少数极端情况下的解决方案。

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