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METHOD AND SYSTEM FOR DETERMINING MINIMUM POST PRODUCTION TEST TIME REQUIRED ON AN INTEGRATED CIRCUIT DEVICE TO ACHIEVE OPTIMUM RELIABILITY

机译:确定用于实现最佳可靠性的集成电路设备上的最少后期生产测试时间的方法和系统

摘要

A method and system for determining minimum post production test time on an integrated circuit device to achieve optimal reliability of that device utilizing defect counts. The number of defective cells or active elements with defective cells (DEFECTS) on the integrated circuit device are counted and this count serves as a basis for determining the minimum test time. A higher number of DEFECTS results in longer post production testing in order to achieve optimum reliability of the integrated circuit device. The number of DEFECTS can be counted on a device internal to the integrated circuit device and made available to determine the minimum required test time. The number of DEFECTS can also be obtained external to the integrated circuit device by intercepting information routed to another device. Information provided internally and externally can also reveal the physical location of DEFECTS to further refine the minimum required test time.
机译:一种用于确定集成电路器件上的最小后期测试时间以利用缺陷计数实现该器件的最佳可靠性的方法和系统。计算集成电路器件上的缺陷单元或具有缺陷单元的有源元件(DEFECTS)的数量,该计数用作确定最小测试时间的基础。较大数量的DEFECTS会导致更长的生产后测试,以实现集成电路设备的最佳可靠性。缺陷的数量可以在集成电路设备内部的设备上进行计数,并可以用来确定所需的最小测试时间。也可以通过截取路由到另一个设备的信息来在集成电路设备外部获得DEFECTS的数量。内部和外部提供的信息还可以显示DEFECTS的物理位置,以进一步优化所需的最小测试时间。

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