FLIP CHIP BONDING METHOD FOR ENHANCING THE PERFORMANCE OF CONNECTION IN FLIP CHIP PACKAGING PROCESS AND LAYERED METAL ARCHITECTURE OF SUBSTRATE FOR STUD BUMP

摘要

A flip chip bonding method for enhancing a bonding performance between a chip and a substrate by forming a bump on the chip or the substrate, and a layered architecture of the substrate for the same are disclosed. The flip chip bonding method comprises the steps of performing pretreatment of a wafer having chips, dicing it, and obtaining the pretreated individual chip; performing pretreatment of a substrate; aligning the pads of the pretreated chip with the pads of the pretreated substrate, and bonding the chip and the substrate together by applying an ultrasonic wave and heat using a collet and simultaneously applying pressure; and performing posttreatment for filling or molding resin after bonding. The chip or the substrate is formed with a plated bump, a stud bump or a wedge bump, respectively. Here, the stud bump or the wedge bump can be additionally formed on the plated bump. The bump can be made of Au, Ni, Ag or Cu. The bump of the substrate has the same size as the bump of the chip or any one of the bump of the substrate and the bump of the chip has a larger size than the other of them. The substrate is plated with Au, Ag, Cu, or Sri.