首页> 外国专利> METHOD FOR FORMING GATE ELECTRODE OF SEMICONDUCTOR DEVICE TO IMPROVE RELIABILITY OF SEMICONDUCTOR DEVICE AND EMBODY HIGH INTEGRATION

METHOD FOR FORMING GATE ELECTRODE OF SEMICONDUCTOR DEVICE TO IMPROVE RELIABILITY OF SEMICONDUCTOR DEVICE AND EMBODY HIGH INTEGRATION

机译:形成半导体器件门极电极以提高半导体器件可靠性和集成度高集成度的方法

摘要

PURPOSE: A method for forming a gate electrode of a semiconductor device is provided to improve the reliability of a semiconductor device and embody high integration by preventing a pattern profile defect caused by an insufficient thickness margin in a gate etch process. CONSTITUTION: A gate oxide layer(22) and a polysilicon layer are formed on a semiconductor substrate(21). A hard mask layer is formed on the polysilicon layer. The hard mask layer is patterned by an etch process using a photoresist pattern. The polysilicon layer is patterned by an etch process using the patterned hard mask layer as an etch mask. After a BARC(bottom anti-reflective coating) is formed on the resultant structure, the patterned hard mask layer is exposed by an etch-back process and the BARC is left in an active region. The patterned hard mask layer is removed by using the remaining BARC as an etch stop layer. The remaining BARC is eliminated.
机译:目的:提供一种用于形成半导体器件的栅电极的方法,以通过防止由栅极蚀刻工艺中的厚度裕度不足引起的图案轮廓缺陷来提高半导体器件的可靠性并体现高集成度。组成:栅极氧化物层(22)和多晶硅层形成在半导体衬底(21)上。在多晶硅层上形成硬掩模层。通过使用光致抗蚀剂图案的蚀刻工艺来图案化硬掩模层。通过使用图案化的硬掩模层作为蚀刻掩模的蚀刻工艺来图案化多晶硅层。在所得到的结构上形成BARC(底部抗反射涂层)之后,通过回蚀工艺对图案化的硬掩模层进行曝光,并将BARC留在有源区中。通过使用剩余的BARC作为蚀刻停止层来去除图案化的硬掩模层。剩余的BARC被消除。

著录项

  • 公开/公告号KR20050010147A

    专利类型

  • 公开/公告日2005-01-27

    原文格式PDF

  • 申请/专利权人 MAGNACHIP SEMICONDUCTOR LTD.;

    申请/专利号KR20030049038

  • 发明设计人 WON YONG SIK;

    申请日2003-07-18

  • 分类号H01L21/336;

  • 国家 KR

  • 入库时间 2022-08-21 22:05:58

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