首页> 外国专利> METHOD FOR FORMING GATE ELECTRODE OF SEMICONDUCTOR DEVICE TO EMBODY STABILITY OF DEVICE

METHOD FOR FORMING GATE ELECTRODE OF SEMICONDUCTOR DEVICE TO EMBODY STABILITY OF DEVICE

机译:形成半导体器件的门极电极以使器件稳定的方法

摘要

PURPOSE: A method for forming a gate electrode of a semiconductor device is provided to embody stability of a device by preventing a notching phenomenon of a PMOS(p-channel metal oxide semiconductor) gate electrode. CONSTITUTION: A gate oxide layer and an undoped polysilicon layer are formed on a semiconductor substrate(11) in which an NMOS transistor area and a PMOS transistor area are defined. The undoped polysilicon layer in the NMOS transistor area is doped to form a doped polysilicon layer. The doped polysilicon layer in the NMOS transistor area and the undoped polysilicon layer in the PMOS transistor area are patterned by a main etch process using mixture gas of HBr/He-O2. An NMOS gate electrode(140N) and a PMOS gate electrode(140P) are formed by an over-etch process using mixture gas of HBr/N2/He-O2.
机译:目的:提供一种用于形成半导体器件的栅电极的方法,以通过防止PMOS(p沟道金属氧化物半导体)栅电极的切口现象来体现器件的稳定性。组成:在半导体衬底(11)上形成栅氧化层和未掺杂的多晶硅层,在其中定义了NMOS晶体管区域和PMOS晶体管区域。掺杂NMOS晶体管区域中的未掺杂的多晶硅层以形成掺杂的多晶硅层。通过使用HBr / He-O2的混合气体通过主蚀刻工艺对NMOS晶体管区域中的掺杂多晶硅层和PMOS晶体管区域中的未掺杂多晶硅层进行构图。使用HBr / N2 / He-O2的混合气体通过过蚀刻工艺形成NMOS栅电极(140N)和PMOS栅电极(140P)。

著录项

  • 公开/公告号KR20050009614A

    专利类型

  • 公开/公告日2005-01-25

    原文格式PDF

  • 申请/专利权人 MAGNACHIP SEMICONDUCTOR LTD.;

    申请/专利号KR20030049413

  • 发明设计人 KANG YANG BEOM;

    申请日2003-07-18

  • 分类号H01L21/336;

  • 国家 KR

  • 入库时间 2022-08-21 22:05:59

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