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METHOD FOR FABRICATING SEMICONDUCTOR DEVICE TO AVOID PARASITIC TRANSISTOR EFFECT AND REDUCE LEAKAGE CURRENT BETWEEN CELLS
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE TO AVOID PARASITIC TRANSISTOR EFFECT AND REDUCE LEAKAGE CURRENT BETWEEN CELLS
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机译:一种制造半导体器件的方法来避免寄生晶体管的影响并减少电池之间的泄漏电流
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摘要
A kind of purpose: method, it is arranged to the depth for avoiding parasitic transistor effect and reducing by electric leakage one moat of flow control between cells for manufacturing semiconductor device, is formed in the edge of an isolated area of substrate during STI (shallow trench isolation). Construction: a pad nitride layer pattern formation of one pad oxide layer model of overlapping is in semi-conductive substrate (40). The first ditch is etched to form by the semiconductor substrate of pad nitride layer model exposure. One oxide layer spacer is formed in the height of the sidewall sections of the first ditch. The polysilicon layer of one doping is formed in composite structure and forms an impurity diffusion zone in the semiconductor substrate that the bottom and side surface with the first ditch contacts. Polysilicon layer is the polysilicon layer mode that an island is formed in the first ditch of oxide layer spacer that woollen blanket corrodes. Oxide layer spacer is removed. It is eliminated in the semiconductor substrate of the exposed bottom of the first ditch by a predetermined depth to form semiconductor substrate. One isolated oxide layer (60) is formed to fill first and second ditch.
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